Education:

• PhD Computer Science Syracuse University 1992
• Computer Engineer Degree Syracuse University 1990
• M.S.E.E. University of Missouri-Columiba 1984
• B.S.E.E. University of Missouri-Columbia 1983

Teaching:

• EECS 645 Computer Architecture
• EECS 240 Digital Designs Design
• EECS 753 Embedded and Real Time Systems
• EECS 690 Reconfigurable Computing

Service:

Research:

• Embedded Systems
• Distributed Systems
• Computer Architecture

Affiliations:

Memberships:

• Senior Member IEEE

Honors:

• Who's Who In Science and Engineering 1994 - Present
• Departmental Research Award, Electrical Engineering University of Arkansas, 1995
• General Managers Award, General Electric Co 1990

Selected Publications:

• David Andrews, Wesley Peck, Jason Agron, Keith Preston, Ed Komp, Mike Finley, Ron Sass, hthreads: A Hardware/Software Co-Designed Multithreaded RTOS Kernel, Proceedings of the 10th IEEE International Conference on Emerging Technologies and Factory Automation Facolta' di Ingegneria, Catania, Italy, 19-22 September 2005.
• David Andrews, Iain Bate, Thomas Nolte, Clara M. Otero Perez, Stefan M. Petters, Impact of Embedded Systems Evolution on RTOS Use and Design”, Proceedings of the 1st International Workshop Operating System Platforms for Embedded Real-Time Applications (OSPERT'05) in conjunction with the 17th Euromicro International Conference on Real-Time Systems (ECRTS'05) pp. 13-19, Palma de Mallorca, Balearic Islands, Spain, 2005
• R. Jidin, D. Andrews, W. Peck, D. Chirpich, K. Stout, J. Gauch, Evaluation of the Hybrid Multithreading Programming Model using Image Processing Transform, Accepted at 12th Reconfigurable Architectures Workshop (RAW 2005), April 4-5, 2005, Denver, Colorado, USA
• Wesley Peck, David Andrews, Ed Komp, Jason Agron, Mike Finley, Hardware/Software Co-Design of Operating Systems for Thread Management and Scheduling, Works In Progress Session (RTSS, WIP 2004) of the 25th IEEE International Real-Time Systems Symposium Lisbon, Portugal, December 5-8, 2004.
• Andrews, DL., et al, Programming Models for Hybrid FPGA/CPU Computational Components: A Missing Link, IEEE Micro, Vol. 24, No 4; July/August 2004, pp. 42-53
• Andrews, D.L., Niehaus, D., Ashenden, P., Programming Models for Hybrid FPGA/CPU Computational Components, IEEE Computer, Vol. 37, No. 1; Jan. 2004, pp. 118-120
• Andrews, D., Vemuri, R., Chelberg, D., Fleeman, D., Parrott, D., Welch, L., Brandt, S., A Framework for Using Benefit Functions in Complex Real Time Systems, Journal of Parallel and Distributed Computing Practices, Vol 5, No 1, Nova Science Publishers, Inc., January 2002
• Andrews, D.L., Austin, P.R., Costello, J.P., LeVan, D.L., Interprocess Communications in the AN/BSY-2 Distributed Computer System: A Case Study, Journal of Systems and Software, vol. 61, no 3, April 2002, pp.233-242
• Andrews, D.L., Structured Embedded Systems Design, Special Issue of IEEE Computer Architecture Technical Committee Newsletter, Fall 2000, pp.56-62

Patents: